NXP Semiconductors /MIMXRT1064 /IOMUXC_GPR /GPR11

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Interpret as GPR11

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (M7_APC_AC_R0_CTRL_0)M7_APC_AC_R0_CTRL 0 (M7_APC_AC_R1_CTRL_0)M7_APC_AC_R1_CTRL 0 (M7_APC_AC_R2_CTRL_0)M7_APC_AC_R2_CTRL 0 (M7_APC_AC_R3_CTRL_0)M7_APC_AC_R3_CTRL 0BEE_DE_RX_EN

M7_APC_AC_R1_CTRL=M7_APC_AC_R1_CTRL_0, M7_APC_AC_R2_CTRL=M7_APC_AC_R2_CTRL_0, M7_APC_AC_R0_CTRL=M7_APC_AC_R0_CTRL_0, M7_APC_AC_R3_CTRL=M7_APC_AC_R3_CTRL_0

Description

GPR11 General Purpose Register

Fields

M7_APC_AC_R0_CTRL

Access control of memory region-0

0 (M7_APC_AC_R0_CTRL_0): No access protection

1 (M7_APC_AC_R0_CTRL_1): M7 debug protection enabled

2 (M7_APC_AC_R0_CTRL_2): FlexSPI access protection

3 (M7_APC_AC_R0_CTRL_3): Both M7 debug and FlexSPI access are protected

M7_APC_AC_R1_CTRL

Access control of memory region-1

0 (M7_APC_AC_R1_CTRL_0): No access protection

1 (M7_APC_AC_R1_CTRL_1): M7 debug protection enabled

2 (M7_APC_AC_R1_CTRL_2): FlexSPI access protection

3 (M7_APC_AC_R1_CTRL_3): Both M7 debug and FlexSPI access are protected

M7_APC_AC_R2_CTRL

Access control of memory region-2

0 (M7_APC_AC_R2_CTRL_0): No access protection

1 (M7_APC_AC_R2_CTRL_1): M7 debug protection enabled

2 (M7_APC_AC_R2_CTRL_2): FlexSPI access protection

3 (M7_APC_AC_R2_CTRL_3): Both M7 debug and FlexSPI access are protected

M7_APC_AC_R3_CTRL

Access control of memory region-3

0 (M7_APC_AC_R3_CTRL_0): No access protection

1 (M7_APC_AC_R3_CTRL_1): M7 debug protection enabled

2 (M7_APC_AC_R3_CTRL_2): FlexSPI access protection

3 (M7_APC_AC_R3_CTRL_3): Both M7 debug and FlexSPI access are protected

BEE_DE_RX_EN

BEE data decryption of memory region-n (n = 3 to 0)

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